CRpi
A library for rpi with intefaces to: gpio, pwm, dma
gpio_internal.h
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1 #ifndef GPIO_INTERNAL_H
2 #define GPIO_INTERNAL_H
3 
11 #define GPIO_BASE_ADDR_PHYS (peripheralsBaseAddressPhys+0x200000)
13 #define GPIO_AREA_LEN 0xC0
15 
16 //function select registers
17 //there's 6 of these register, each referring to 6 pins, except the last one
19 #define GPFSEL_OFF 0
20 #define GPFSEL_LEN 4
22 #define GPFSELx_OFF(n) (GPFSEL_OFF+GPFSEL_LEN*n)
24 
25 
26 
27 
28 
29 
31 #define GPSET0_OFF 0x1c
33 #define GPSET0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPSET0_OFF)
34 
35 
36 #define GPSET1_OFF 0x20
38 #define GPSET1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPSET1_OFF)
39 
40 
42 #define GPCLEAR0_OFF 0x28
44 #define GPCLEAR0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPCLEAR0_OFF)
45 
46 
47 #define GPCLEAR1_OFF 0x2C
49 #define GPCLEAR1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPCLEAR1_OFF)
50 
51 
53 #define GPLEV0_OFF 0x34
55 #define GPLEV0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPLEV0_OFF)
56 
57 
58 #define GPLEV1_OFF 0x38
60 #define GPLEV1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPLEV1_OFF)
61 
62 
64 #define GPEDS0_OFF 0x40
66 #define GPEDS0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPEDS0_OFF)
67 
68 
69 #define GPEDS1_OFF 0x44
71 #define GPEDS1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPEDS1_OFF)
72 
73 
74 
76 #define GPREN0_OFF 0x4C
78 #define GPREN0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPREN0_OFF)
79 
80 
81 #define GPREN1_OFF 0x50
83 #define GPREN1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPREN1_OFF)
84 
85 
87 #define GPFEN0_OFF 0x58
89 #define GPFEN0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPFEN0_OFF)
90 
91 
92 #define GPFEN1_OFF 0x5C
94 #define GPFEN1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPFEN1_OFF)
95 
96 
98 #define GPHEN0_OFF 0x64
100 #define GPHEN0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPHEN0_OFF)
101 
102 
103 #define GPHEN1_OFF 0x68
105 #define GPHEN1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPHEN1_OFF)
106 
107 
109 #define GPLEN0_OFF 0x70
111 #define GPLEN0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPLEN0_OFF)
112 
113 
114 #define GPLEN1_OFF 0x74
116 #define GPLEN1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPLEN1_OFF)
117 
118 
120 #define GPAREN0_OFF 0x7C
122 #define GPAREN0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPAREN0_OFF)
123 
124 
125 #define GPAREN1_OFF 0x80
127 #define GPAREN1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPAREN1_OFF)
128 
129 
131 #define GPAFEN0_OFF 0x88
133 #define GPAFEN0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPAFEN0_OFF)
134 
135 
136 #define GPAFEN1_OFF 0x8C
138 #define GPAFEN1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPAFEN1_OFF)
139 
140 
142 #define GPPUD_OFF 0x94
144 #define GPPUD_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPPUD_OFF)
145 
146 
148 #define GPPUDCLK0_OFF 0x98
150 #define GPPUDCLK0_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPPUDCLK0_OFF)
151 
152 
153 #define GPPUDCLK1_OFF 0x9C
155 #define GPPUDCLK1_ADDR_PHYS (GPIO_BASE_ADDR_PHYS+GPPUDCLK1_OFF)
156 
157 
158 #endif